recursion - Passing rules to make recursively -


This is probably trivial to do this but I can not see how.

I have to call a parent makefile to reorder the makefile according to the value of the variable given in the command line.

Ie, I want to be able to call my main makefile on: 

  target some_url = a

Or 

  target some parameters = b

and my main makefile determines the value of TARGET, which invokes makefile to make some_rule . (For example, decide whether to sub-directory_a / makefile or sub-directory / B / makefile to call the rule some_rule to execute the rule.)

Note: I have many rules So, I do not want to list my main makefile list of all possible rules and to make the call to the correct makefile again for each of them. I am hoping that my main makefile can only be a few lines long and I will not have to update whenever I make a new rule.

you 

  default_target:%: $ (create) The rules are a rule in which the pattern matches all the rules (which is GNU. Manual making is called match-some rules);  $ @  The current goal is to note that there is no prescription in the  default_target:  rule, so call without any goal  make  Rule (There is only one that applies and is a recipe for trying to create  default_target . 
 
 The warning of this approach is that the goal should not be declared counterfeit If you want a fake target, you should re-specify the recipe for those goals. For example, 
 
  PHONY_TARGETS = all clean distrain. PHONY: $ (PHONY_TARGETS) $ (PHONY_TARGETS): $ (make) - Some _ directory _ $ (target) $ @%: $ (Make) - Some_book_ _ $ (target) $ @  
 
 Unfortunately, I do not have any tricks to declare to everyone the target texture that you really want to do . 
 
 Note that you can use the  ifeq  etc. with the variable set to the command line if you want to allow the directory From some parts of the world, such as 
 
 %: ifeq ($ (TARGET), Gibson) was successfully hacked 'Planet $ @'; Other $ (Make) - Some guidelines _ $ (Target) $ @ asif  
 
 Also note that it is a common way to set general variables for many makefiles, code> normal. Include Mk , and  from other makefiles included:  
  ./common.mk # to include common.mk from some_directory_a / makefile  
 
 But you have to decide which approach is a better fit for your project.

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